CONTRIBUTORS
Matthew Moberg
Portfolio Manager,
Franklin Equity
Predictions about artificial intelligence (AI) are everywhere—what it'll do, how big the market could get, how much is being spent to build it. Those are outcome questions.
Ours is more fundamental: Why will AI keep getting better?
The answer starts with compute. For 60+ years, computing power improved at a pace with almost no precedent. The engine behind that progress was Moore's Law, the decades-old pattern of computing power roughly doubling every two years.1 As that engine slows, a new one is taking its place.
The five questions that follow trace how compute got us here, why it may keep improving and what that could mean for investors.
1 | Why is AI taking off now?
After nearly 39 doublings under Moore’s Law, leading-edge chips now contain more than 200 billion transistors.2
Exponents in their early stages feel and are insignificant, but as the exponents continue to compound, they start to become massive and change our lives and the economy around us. We cannot think of another innovation that has continued to improve so consistently. Even though Moore’s law is slowing, it is still creating massive improvements at huge scale.
A widely used Silicon Valley parable compares exponential growth to doubling grains of rice across a chessboard: the gains compound through the first half, but their scale becomes dramatically larger in the second. Semiconductors have followed a similar path, helping to create the compute power that made today’s AI possible.
2 | If Moore’s Law is slowing, how can compute keep improving?
We are moving from improving the chip to improving the machine around it. Compute is not slowing along the path of Moore’s law, but accelerating.
For most of the semiconductor era, the formula was straightforward: Make transistors smaller, fit more transistors onto a chip and achieve more computing power. Physics and economics are making that approach increasingly difficult.
Transistors within a semiconductor chip are now just a few atoms wide, and shrinking them further has become dramatically more expensive, effectively slowing Moore’s Law.3 But instead of relying on a single processor, compute can increasingly scale across systems that combine processors, memory, packaging, networking, power, cooling and software.
At the largest scale, these systems can coordinate thousands of processors inside what are effectively AI factories.
3 | Why does compute matter so much?
The answer is captured in what AI researcher Rich Sutton called the “Bitter Lesson”—over long periods, the most successful approaches have tended to be the ones that can absorb more compute and more data.4
Chess offers an early example. Computers surpassed human experts not by being taught the special structure of the game, but by using processing power to evaluate millions of positions per second.
Modern AI reflects the same principle. The core mathematics has existed for decades. What changed was the scale at which those ideas could be applied. As compute increased, researchers could train larger models on larger datasets and tackle relationships that previously exceeded the practical limits of computing. More compute has unlocked new capabilities.
4 | Why do we think compute can keep accelerating?
AI compute no longer depends on a single source of improvement.
Most technologies follow an S-curve: a period of rapid improvement that eventually gives way to slower, incremental gains. Semiconductors have been a remarkable exception, and the shift to system-level scaling may mark another inflection point. Instead of relying on one S-curve, the AI Scaling Era may be built on several S-curves advancing at the same time across memory, packaging, networking, power and tensor compute.
We see these five frontiers as potential drivers of the next wave of compute improvement, with each supported by a visible engineering roadmap, as the table below shows.
Five Frontiers That Could Drive the Next Wave of Compute Improvement
5 | What could it mean for investors?
Sustained improvement at this scale could mean more disruption.
Industrial revolutions are built on general-purpose technologies—foundational technologies that improve over time, spread across industries and become platforms for further innovation. The semiconductor helped take computing from mainframes to personal computers to smartphones and became one of the major technological foundations of the Third Industrial Revolution.
We believe AI is emerging as a general-purpose technology that could help drive the Fourth Industrial Revolution.
For investors, that could mean more change across the global economy and in market leadership, with innovation extending into robotics, genomics, clean energy and blockchain alongside continued advances in AI.
The Why of AI (Parts I-II)
Why is this moment different? This paper explores why most technologies eventually plateau, why semiconductors have been the exception, and how the shift from Moore’s Law to AI scaling may be helping usher in the Fourth Industrial Revolution.
The AI Scaling Era and the Advancements Ahead (Part III)
Where does the next wave of compute come from? This companion paper looks beyond the individual chip to the technologies reshaping the entire computing system and the multiple S-curves that could drive the next era of AI scaling.
Endnotes
- Moore's Law, coined in 1965, is an observation about transistor density, noting that the number of transistors on a chip doubles roughly every two years. That density increase is what has driven the corresponding rise in processing power over time.
- Source: “The Blackwell Epoch: How NVIDIA’s 208‑Billion Transistor Titan Redefined the AI Frontier.” FinancialContent. January 8, 2026. The figure of nearly 39 doublings reflects a Franklin Equity calculation of approximately 60 years of Moore’s Law, including a faster rate of improvement during its first decade.
- Sources: “The Transistor at 3 Nanometers,” Engineering for Adults, accessed July 9, 2026; International Roadmap for Devices and Systems (IRDS™), 2024 Edition. Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE), 2024.
- Source: Sutton, Richard S. “The Bitter Lesson.” March 13, 2019. Incomplete Ideas.
- Sources: Nutty, “The Age of Interconnection: Connecting the Dots,” Nutty (Substack), April 22, 2026; “HBM: The History of Stacked Memory and Where It’s At Now,” Mark’s PC Parts, March 27, 2026; Luke James, “JEDEC Officially Releases HBM4 Memory Standard,” All About Circuits, April 28, 2025. HBM (High Bandwidth Memory) stacks memory chips vertically so data reaches the processor faster and with less wasted power. Hybrid bonding and wider buses are manufacturing techniques that pack these stacks even tighter to speed that transfer further.
- Source: “CoWoS-S, R, L Explained – TSMC’s Advanced Packaging Strategies for AI & HPC.” Aminext. April 20, 2025. CoWoS (Chip-on-Wafer-on-Substrate) is a packaging method, pioneered by TSMC, that places multiple chips side by side on one base so they act almost like a single chip. 3D integration and glass substrates push that further (stacking chips vertically, or swapping in glass as the base layer) to fit more computing power into less space.
- Source: Blake Crosley, “NVLink and Scale-Up Networking: When 800G Ethernet Isn’t Enough,” Introl, February 4, 2026. Co-packaged optics place the light-based components that move data between chips right next to the processor instead of on a separate cable, cutting energy loss and delay. Photonics is the broader use of light instead of electricity to move data at much higher speeds.
- Source: LiquidStack, “Why Data Center Efficiency Gains Have Stalled Since 2018.” March 8, 2022. 800VDC architecture means redesigning a data center's electrical system to run on 800 volts of direct current, which loses less energy than today's standard. SMRs (small modular reactors) are compact nuclear reactors that could be built on-site to power data centers directly.
- Sources: NVIDIA, “NVIDIA V100 Tensor Core GPU,” accessed July 9, 2026; Emanuele Del Sozzo, Martin Fleming, Kenneth Flamm, and Neil Thompson, “How Much Progress Has There Been in NVIDIA Data center GPUs?” arXiv, 2026. Tensor compute refers to chip circuits purpose-built for the matrix math behind AI calculations, rather than general processing. “Less precise number formats” means computing with less exact numbers—for example, rounding to fewer decimal places—in exchange for significantly faster processing, a trade-off that works well for many AI workloads.
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